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authorjaseg <git@jaseg.de>2023-07-05 13:42:37 +0200
committerjaseg <git@jaseg.de>2023-07-05 13:42:37 +0200
commitcb188ac593b6f39b93d26224e9b16faa22babf8d (patch)
treeeca61f82a7df05334aa691469707334afca46cbc /gerbonara/cad/kicad/pcb.py
parenta5087636ab20f0a2f4a1746a845b95d143397287 (diff)
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kicad: various pcb re-serialization fixes
Diffstat (limited to 'gerbonara/cad/kicad/pcb.py')
-rw-r--r--gerbonara/cad/kicad/pcb.py4
1 files changed, 2 insertions, 2 deletions
diff --git a/gerbonara/cad/kicad/pcb.py b/gerbonara/cad/kicad/pcb.py
index 3d668d2..2b28655 100644
--- a/gerbonara/cad/kicad/pcb.py
+++ b/gerbonara/cad/kicad/pcb.py
@@ -70,8 +70,8 @@ class StackupSettings:
copper_finish: Named(str) = None
dielectric_constraints: Named(YesNoAtom()) = None
edge_connector: Named(AtomChoice(Atom.yes, Atom.bevelled)) = None
- castellated_pads: Named(bool) = None
- edge_plating: Named(bool) = None
+ castellated_pads: Named(YesNoAtom()) = None
+ edge_plating: Named(YesNoAtom()) = None
TFBool = YesNoAtom(yes=Atom.true, no=Atom.false)