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authorChintalagiri Shashank <shashank.chintalagiri@gmail.com>2019-05-11 04:03:20 +0530
committerChintalagiri Shashank <shashank.chintalagiri@gmail.com>2019-05-11 04:03:59 +0530
commit37dfd86368d080534eeefec9f726cae9e5f03e7e (patch)
tree43beb650eee9d7a524c8c54b19b46ea1bd4227ea /gerber
parent2601ae8eab8d7be807bdbed264cd943e441a8da0 (diff)
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Add hook for outline layer to PCB class
Diffstat (limited to 'gerber')
-rw-r--r--gerber/pcb.py6
1 files changed, 6 insertions, 0 deletions
diff --git a/gerber/pcb.py b/gerber/pcb.py
index ba15161..56deaa3 100644
--- a/gerber/pcb.py
+++ b/gerber/pcb.py
@@ -95,6 +95,12 @@ class PCB(object):
('top', 'bottom', 'internal')]))
@property
+ def outline_layer(self):
+ for layer in self.layers:
+ if layer.layer_class == 'outline':
+ return layer
+
+ @property
def layer_count(self):
""" Number of *COPPER* layers
"""