From 2926e887c4360317809bd2a7eb4ad42290cfefe3 Mon Sep 17 00:00:00 2001 From: jaseg Date: Fri, 2 Oct 2020 17:33:32 +0200 Subject: Initial commit --- .../EPT_EC.8_20pin.kicad_mod | 55 ++++++++++++++++++++++ 1 file changed, 55 insertions(+) create mode 100644 common/common_footprints.pretty/EPT_EC.8_20pin.kicad_mod (limited to 'common') diff --git a/common/common_footprints.pretty/EPT_EC.8_20pin.kicad_mod b/common/common_footprints.pretty/EPT_EC.8_20pin.kicad_mod new file mode 100644 index 0000000..f552e98 --- /dev/null +++ b/common/common_footprints.pretty/EPT_EC.8_20pin.kicad_mod @@ -0,0 +1,55 @@ +(module "EPT_EC.8_20pin" (layer F.Cu) (tedit 5F774092) + (fp_text reference "REF**" (at -6.3 -4.4 unlocked) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15)) (justify left)) + (tstamp 4e289679-ef08-40ee-8053-ab5692e5956e) + ) + (fp_text value "EPT_EC.8_20pin" (at 0 4.6 unlocked) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + (tstamp a211d781-28c2-422c-aad4-be94b0690e2f) + ) + (fp_rect (start -6.3 -3.5) (end 6.3 3.5) (layer F.SilkS) (width 0.2) (tstamp f1562401-ee68-41cc-a8ae-78fb7c553782)) + (pad "" np_thru_hole circle (at 5.2 0) (size 1.27 1.27) (drill 1.27) (layers *.Cu *.Mask) + (solder_mask_margin 0.01) (clearance 0.05) (tstamp c5a49d1d-3fed-446a-94ae-df6875d00938)) + (pad "" np_thru_hole circle (at -5.1 1.5) (size 1.27 1.27) (drill 1.27) (layers *.Cu *.Mask) + (solder_mask_margin 0.01) (clearance 0.05) (tstamp cb8eb9e8-dbeb-4587-a5ef-0f4f5f3ae6e9)) + (pad "1" smd rect (at -3.6 1.7) (size 0.5 1.2) (layers "F.Cu" "F.Paste" "F.Mask") + (solder_mask_margin 0.01) (clearance 0.05) (tstamp 6d51384f-5429-4fc6-b72f-c3d1f667412b)) + (pad "2" smd rect (at -3.6 -1.7) (size 0.5 1.2) (layers "F.Cu" "F.Paste" "F.Mask") + (solder_mask_margin 0.01) (clearance 0.05) (tstamp 4f7a127a-8802-435a-8cdb-8e28c8f595fb)) + (pad "3" smd rect (at -2.8 1.7) (size 0.5 1.2) (layers "F.Cu" "F.Paste" "F.Mask") + (solder_mask_margin 0.01) (clearance 0.05) (tstamp c21d31ba-d8a1-4dbf-91fd-dacee14806d2)) + (pad "4" smd rect (at -2.8 -1.7) (size 0.5 1.2) (layers "F.Cu" "F.Paste" "F.Mask") + (solder_mask_margin 0.01) (clearance 0.05) (tstamp e384e9ed-c4e6-4d3e-9c32-c55051d1c87e)) + (pad "5" smd rect (at -2 1.7) (size 0.5 1.2) (layers "F.Cu" "F.Paste" "F.Mask") + (solder_mask_margin 0.01) (clearance 0.05) (tstamp ba14a21d-2557-436b-a712-0dc65919ade6)) + (pad "6" smd rect (at -2 -1.7) (size 0.5 1.2) (layers "F.Cu" "F.Paste" "F.Mask") + (solder_mask_margin 0.01) (clearance 0.05) (tstamp 2e3232c0-7467-4ea7-91d2-ef4a8e9cef97)) + (pad "7" smd rect (at -1.2 1.7) (size 0.5 1.2) (layers "F.Cu" "F.Paste" "F.Mask") + (solder_mask_margin 0.01) (clearance 0.05) (tstamp 1d689a9f-9653-450c-870c-5ff6c75518c0)) + (pad "8" smd rect (at -1.2 -1.7) (size 0.5 1.2) (layers "F.Cu" "F.Paste" "F.Mask") + (solder_mask_margin 0.01) (clearance 0.05) (tstamp 006d5833-a499-4c45-a757-53cf7a0f0e2e)) + (pad "9" smd rect (at -0.4 1.7) (size 0.5 1.2) (layers "F.Cu" "F.Paste" "F.Mask") + (solder_mask_margin 0.01) (clearance 0.05) (tstamp 988893fe-10a5-4122-9ff5-a12eed5826a9)) + (pad "10" smd rect (at -0.4 -1.7) (size 0.5 1.2) (layers "F.Cu" "F.Paste" "F.Mask") + (solder_mask_margin 0.01) (clearance 0.05) (tstamp fcab1956-2312-49c5-bd7e-aa88eb181980)) + (pad "11" smd rect (at 0.4 1.7) (size 0.5 1.2) (layers "F.Cu" "F.Paste" "F.Mask") + (solder_mask_margin 0.01) (clearance 0.05) (tstamp 8890804f-4d35-4321-acec-154396ef4b30)) + (pad "12" smd rect (at 0.4 -1.7) (size 0.5 1.2) (layers "F.Cu" "F.Paste" "F.Mask") + (solder_mask_margin 0.01) (clearance 0.05) (tstamp 6a27b3c4-3249-4995-9821-95152dc895f9)) + (pad "13" smd rect (at 1.2 1.7) (size 0.5 1.2) (layers "F.Cu" "F.Paste" "F.Mask") + (solder_mask_margin 0.01) (clearance 0.05) (tstamp 92cda29d-c627-462a-99ed-362518b70421)) + (pad "14" smd rect (at 1.2 -1.7) (size 0.5 1.2) (layers "F.Cu" "F.Paste" "F.Mask") + (solder_mask_margin 0.01) (clearance 0.05) (tstamp 36a65114-538d-412f-a1af-1422239dee08)) + (pad "15" smd rect (at 2 1.7) (size 0.5 1.2) (layers "F.Cu" "F.Paste" "F.Mask") + (solder_mask_margin 0.01) (clearance 0.05) (tstamp 78ac54e3-7d1c-4325-8f80-f452b14718af)) + (pad "16" smd rect (at 2 -1.7) (size 0.5 1.2) (layers "F.Cu" "F.Paste" "F.Mask") + (solder_mask_margin 0.01) (clearance 0.05) (tstamp 730aee28-e86b-4328-865c-0c1448a3c9e0)) + (pad "17" smd rect (at 2.8 1.7) (size 0.5 1.2) (layers "F.Cu" "F.Paste" "F.Mask") + (solder_mask_margin 0.01) (clearance 0.05) (tstamp dd316904-ce03-4eba-b7de-10d049e9c3c3)) + (pad "18" smd rect (at 2.8 -1.7) (size 0.5 1.2) (layers "F.Cu" "F.Paste" "F.Mask") + (solder_mask_margin 0.01) (clearance 0.05) (tstamp 098a4454-607d-4305-b4af-e879f20802d4)) + (pad "19" smd rect (at 3.6 1.7) (size 0.5 1.2) (layers "F.Cu" "F.Paste" "F.Mask") + (solder_mask_margin 0.01) (clearance 0.05) (tstamp dc425730-7ae4-416d-a20a-82c7a78c9c6d)) + (pad "20" smd rect (at 3.6 -1.7) (size 0.5 1.2) (layers "F.Cu" "F.Paste" "F.Mask") + (solder_mask_margin 0.01) (clearance 0.05) (tstamp 11a866b1-8ddf-42f0-bef0-68aa59628795)) +) -- cgit