From 91ce4bc0dfcaa246cb40becd1b33a7cd1f56660a Mon Sep 17 00:00:00 2001
From: jaseg <git@jaseg.de>
Date: Sun, 8 Oct 2023 16:44:52 +0200
Subject: Add wire splitter

---
 wire-splitter-pcb/wire-splitter-pcb.kicad_prl | 77 +++++++++++++++++++++++++++
 1 file changed, 77 insertions(+)
 create mode 100644 wire-splitter-pcb/wire-splitter-pcb.kicad_prl

(limited to 'wire-splitter-pcb/wire-splitter-pcb.kicad_prl')

diff --git a/wire-splitter-pcb/wire-splitter-pcb.kicad_prl b/wire-splitter-pcb/wire-splitter-pcb.kicad_prl
new file mode 100644
index 0000000..69ae2ae
--- /dev/null
+++ b/wire-splitter-pcb/wire-splitter-pcb.kicad_prl
@@ -0,0 +1,77 @@
+{
+  "board": {
+    "active_layer": 37,
+    "active_layer_preset": "All Layers",
+    "auto_track_width": true,
+    "hidden_netclasses": [],
+    "hidden_nets": [],
+    "high_contrast_mode": 0,
+    "net_color_mode": 1,
+    "opacity": {
+      "images": 0.6,
+      "pads": 1.0,
+      "tracks": 1.0,
+      "vias": 1.0,
+      "zones": 0.6
+    },
+    "selection_filter": {
+      "dimensions": true,
+      "footprints": true,
+      "graphics": true,
+      "keepouts": true,
+      "lockedItems": false,
+      "otherItems": true,
+      "pads": true,
+      "text": true,
+      "tracks": true,
+      "vias": true,
+      "zones": true
+    },
+    "visible_items": [
+      0,
+      1,
+      2,
+      3,
+      4,
+      5,
+      8,
+      9,
+      10,
+      11,
+      12,
+      13,
+      15,
+      16,
+      17,
+      18,
+      19,
+      20,
+      21,
+      22,
+      23,
+      24,
+      25,
+      26,
+      27,
+      28,
+      29,
+      30,
+      32,
+      33,
+      34,
+      35,
+      36,
+      39,
+      40
+    ],
+    "visible_layers": "fffffff_ffffffff",
+    "zone_display_mode": 0
+  },
+  "meta": {
+    "filename": "wire-splitter-pcb.kicad_prl",
+    "version": 3
+  },
+  "project": {
+    "files": []
+  }
+}
-- 
cgit