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2019-01-31driver: Move traces away from board edgejaseg12-1331/+1576
2019-01-31Small adjustments, fix silkjaseg12-1016/+44823
2019-01-30Throw out a bunch, use a different microcontrollerjaseg4-4420/+5335
2019-01-30Fix lcd connector positionjaseg1-1531/+310
2019-01-29driver: Add mounting holes for RS485 adapterjaseg3-2710/+2365
2019-01-29Modify temp sensor to MSOP fp, add fan connjaseg4-522/+659
2019-01-23Fix R1 footprintjaseg3-138/+145
0603 -> 1206
2019-01-20Fix up a couple of dimensionsjaseg1-43/+44
2019-01-19driver: Fatten a few power tracesjaseg1-231/+232
2019-01-19driver: Fixup SWD header, swap driver outputs for VSW split, finish silkjaseg3-1893/+2198
2019-01-18driver: initial DRC donejaseg1-94/+107
2019-01-18driver: Finish initial routingjaseg3-1532/+1769
2019-01-18driver: Initial layout almost donejaseg3-1677/+2168
2019-01-17driver: Continue layoutjaseg3-2528/+3856
2019-01-17driver: Initial layoutjaseg6-616/+8355
2019-01-15Driver schematic progressjaseg2-214/+1938
2019-01-15Fix double edge issue with driverjaseg1-9/+3
2019-01-15Add initial driver schematic draftjaseg7-0/+1581
2019-01-13TIM3 working stably nowjaseg4-35/+872
2019-01-13Basic timer-based blanking workingjaseg3-23/+54
2019-01-12Make protocol unit tester count test casesjaseg1-1/+6
2019-01-12Protocol unit test workingjaseg1-3/+1
2019-01-12bulk cmd test worksjaseg7-17/+241
2019-01-12Split receiver into logical partsjaseg8-148/+172
2019-01-11Basic command comm worksjaseg7-225/+224
2019-01-10Decoding and comma triggering worksjaseg4-32/+92
2019-01-10Debug scope works nicelyjaseg5-30/+980
2019-01-09Fix up scope modejaseg3-6/+15
2018-12-24Initial detector logic draftjaseg2-1/+48
2018-12-24Pimp ADC measurements with voltage meansjaseg4-38/+69
2018-12-24Add untested ADC mode switching codejaseg5-37/+156
2018-12-24Make center ADC work in "scope mode"jaseg2-49/+7
2018-12-23ADC workingjaseg15-46/+1898
2018-12-22First AC/mux test workingjaseg15-25/+1343
2018-12-208b10b encoder and decoder workingjaseg7-66/+272
Tested on all 24-bit inputs after sync and on ~500M of random input with and without intermediate sync
2018-12-20Add initial center firmwarejaseg14-0/+1381
2018-11-27center: Add BOMjaseg6-179/+1178
2018-11-27Make geber zip filenames more descriptivejaseg2-0/+0
2018-11-27Add corner gerber exportsjaseg14-15/+4036
2018-11-27Add center artworkjaseg4-0/+80
2018-11-27Add prettified gerber outputjaseg12-0/+177253
2018-11-27Fix AO3400 pinoutjaseg17-1266/+17441
2018-11-26center: improve silkjaseg2-19/+109
2018-11-26PCB designs R01 finished (not reviewed yet)jaseg12-278/+10619
2018-11-25center: initial schematicjaseg6-0/+3445
2018-11-24Initial commitjaseg13-0/+3894
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