Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2018-11-26 | center: improve silk | jaseg | 2 | -19/+109 |
2018-11-26 | PCB designs R01 finished (not reviewed yet) | jaseg | 12 | -278/+10619 |
2018-11-25 | center: initial schematic | jaseg | 6 | -0/+3445 |
2018-11-24 | Initial commit | jaseg | 13 | -0/+3894 |