diff options
Diffstat (limited to 'corner/corner.kicad_pcb-bak')
| -rw-r--r-- | corner/corner.kicad_pcb-bak | 607 |
1 files changed, 607 insertions, 0 deletions
diff --git a/corner/corner.kicad_pcb-bak b/corner/corner.kicad_pcb-bak new file mode 100644 index 0000000..2b0dc2b --- /dev/null +++ b/corner/corner.kicad_pcb-bak @@ -0,0 +1,607 @@ +(kicad_pcb (version 20171130) (host pcbnew "(5.0.1)") + + (general + (thickness 1.6) + (drawings 55) + (tracks 0) + (zones 0) + (modules 7) + (nets 5) + ) + + (page A4) + (layers + (0 F.Cu signal) + (31 B.Cu signal) + (32 B.Adhes user) + (33 F.Adhes user) + (34 B.Paste user) + (35 F.Paste user) + (36 B.SilkS user) + (37 F.SilkS user) + (38 B.Mask user) + (39 F.Mask user) + (40 Dwgs.User user) + (41 Cmts.User user) + (42 Eco1.User user) + (43 Eco2.User user) + (44 Edge.Cuts user) + (45 Margin user) + (46 B.CrtYd user) + (47 F.CrtYd user) + (48 B.Fab user) + (49 F.Fab user) + ) + + (setup + (last_trace_width 0.25) + (trace_clearance 0.2) + (zone_clearance 0.508) + (zone_45_only no) + (trace_min 0.2) + (segment_width 0.2) + (edge_width 0.15) + (via_size 0.8) + (via_drill 0.4) + (via_min_size 0.4) + (via_min_drill 0.3) + (uvia_size 0.3) + (uvia_drill 0.1) + (uvias_allowed no) + (uvia_min_size 0.2) + (uvia_min_drill 0.1) + (pcb_text_width 0.3) + (pcb_text_size 1.5 1.5) + (mod_edge_width 0.15) + (mod_text_size 1 1) + (mod_text_width 0.15) + (pad_size 2.8 5) + (pad_drill 0) + (pad_to_mask_clearance 0.051) + (solder_mask_min_width 0.25) + (aux_axis_origin 0 0) + (visible_elements FFFFFF7F) + (pcbplotparams + (layerselection 0x010fc_ffffffff) + (usegerberextensions false) + (usegerberattributes false) + (usegerberadvancedattributes false) + (creategerberjobfile false) + (excludeedgelayer true) + (linewidth 0.100000) + (plotframeref false) + (viasonmask false) + (mode 1) + (useauxorigin false) + (hpglpennumber 1) + (hpglpenspeed 20) + (hpglpendiameter 15.000000) + (psnegative false) + (psa4output false) + (plotreference true) + (plotvalue true) + (plotinvisibletext false) + (padsonsilk false) + (subtractmaskfromsilk false) + (outputformat 1) + (mirror false) + (drillshape 1) + (scaleselection 1) + (outputdirectory "")) + ) + + (net 0 "") + (net 1 /A) + (net 2 /B) + (net 3 /C) + (net 4 /D) + + (net_class Default "This is the default net class." + (clearance 0.2) + (trace_width 0.25) + (via_dia 0.8) + (via_drill 0.4) + (uvia_dia 0.3) + (uvia_drill 0.1) + (add_net /A) + (add_net /B) + (add_net /C) + (add_net /D) + ) + + (module footprints:led_tape_3528_2835 (layer B.Cu) (tedit 5BF8B34C) (tstamp 5C0C2A5E) + (at 165.05 58.475 217) + (path /5C191348) + (fp_text reference J2 (at 0 -0.5 217) (layer B.SilkS) hide + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_text value Conn_01x02 (at 0 0.5 217) (layer B.Fab) hide + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_line (start -0.5 0) (end 0.5 0) (layer B.SilkS) (width 0.5)) + (fp_line (start 4 -22) (end 4 0) (layer B.SilkS) (width 0.5)) + (fp_line (start -4 0) (end -4 -21.999999) (layer B.SilkS) (width 0.5)) + (fp_line (start -4 -15) (end 3.999999 -15) (layer B.SilkS) (width 0.5)) + (fp_line (start 3.999999 -15) (end -4 -12) (layer B.SilkS) (width 0.5)) + (fp_line (start -4 -12) (end 4 -12) (layer B.SilkS) (width 0.5)) + (fp_line (start 4 -14) (end -1.5 -12) (layer B.SilkS) (width 0.5)) + (fp_line (start 1 -12) (end 3.999999 -13) (layer B.SilkS) (width 0.5)) + (fp_line (start -4 -14) (end -1.5 -15) (layer B.SilkS) (width 0.5)) + (fp_line (start -4 -13) (end 1 -15) (layer B.SilkS) (width 0.5)) + (pad 2 smd oval (at 2.25 0 217) (size 2.8 5) (layers B.Cu B.Paste B.Mask) + (net 2 /B)) + (pad 1 smd oval (at -2.25 0 217) (size 2.8 5) (layers B.Cu B.Paste B.Mask) + (net 1 /A)) + ) + + (module footprints:led_tape_3528_2835 (layer B.Cu) (tedit 5BF8B351) (tstamp 5C0C2A12) + (at 174.7 44.4 270) + (path /5C1913C4) + (fp_text reference J1 (at 0 -0.5 270) (layer B.SilkS) hide + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_text value Conn_01x02 (at 0 0.5 270) (layer B.Fab) hide + (effects (font (size 1 1) (thickness 0.15)) (justify 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(size 2.8 5) (layers F.Cu F.Paste F.Mask) + (net 3 /C)) + ) + + (module footprints:led_tape_3528_2835 (layer B.Cu) (tedit 5BF8B35D) (tstamp 5C0C2136) + (at 154.3 64.6 180) + (path /5C19123A) + (fp_text reference J3 (at 0 -0.5 180) (layer B.SilkS) hide + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_text value Conn_01x02 (at 0 0.5 180) (layer B.Fab) hide + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) + ) + (fp_line (start -4 -13) (end 1 -15) (layer B.SilkS) (width 0.5)) + (fp_line (start -4 -14) (end -1.5 -15) (layer B.SilkS) (width 0.5)) + (fp_line (start 1 -12) (end 4 -13) (layer B.SilkS) (width 0.5)) + (fp_line (start 4 -14) (end -1.5 -12) (layer B.SilkS) (width 0.5)) + (fp_line (start -4 -12) (end 4 -12) (layer B.SilkS) (width 0.5)) + (fp_line (start 4 -15) (end -4 -12) (layer B.SilkS) (width 0.5)) + (fp_line (start -4 -15) (end 4 -15) (layer B.SilkS) (width 0.5)) + (fp_line (start -4 0) (end -4 -22) (layer B.SilkS) (width 0.5)) + (fp_line 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