diff options
| -rw-r--r-- | driver_fw/src/main.c | 282 |
1 files changed, 277 insertions, 5 deletions
diff --git a/driver_fw/src/main.c b/driver_fw/src/main.c index ae1bd08..84ddeab 100644 --- a/driver_fw/src/main.c +++ b/driver_fw/src/main.c @@ -8,6 +8,265 @@ uint32_t read_fuse_monitor(void); void set_rj45_leds(uint32_t leds); void set_status_leds(uint32_t leds); +uint16_t waveform[512] = { + 128, 255, +131, 255, +134, 255, +137, 255, +140, 254, +143, 254, +146, 254, +149, 253, +152, 253, +155, 252, +158, 251, +162, 250, +165, 250, +167, 249, +170, 248, +173, 246, +176, 245, +179, 244, +182, 243, +185, 241, +188, 240, +190, 238, +193, 237, +196, 235, +198, 234, +201, 232, +203, 230, +206, 228, +208, 226, +211, 224, +213, 222, +215, 220, +218, 218, +220, 215, +222, 213, +224, 211, +226, 208, +228, 206, +230, 203, +232, 201, +234, 198, +235, 196, +237, 193, +238, 190, +240, 188, +241, 185, +243, 182, +244, 179, +245, 176, +246, 173, +248, 170, +249, 167, +250, 165, +250, 162, +251, 158, +252, 155, +253, 152, +253, 149, +254, 146, +254, 143, +254, 140, +255, 137, +255, 134, +255, 131, +255, 128, +255, 124, +255, 121, +255, 118, +254, 115, +254, 112, +254, 109, +253, 106, +253, 103, +252, 100, +251, 97, +250, 93, +250, 90, +249, 88, +248, 85, +246, 82, +245, 79, +244, 76, +243, 73, +241, 70, +240, 67, +238, 65, +237, 62, +235, 59, +234, 57, +232, 54, +230, 52, +228, 49, +226, 47, +224, 44, +222, 42, +220, 40, +218, 37, +215, 35, +213, 33, +211, 31, +208, 29, +206, 27, +203, 25, +201, 23, +198, 21, +196, 20, +193, 18, +190, 17, +188, 15, +185, 14, +182, 12, +179, 11, +176, 10, +173, 9, +170, 7, +167, 6, +165, 5, +162, 5, +158, 4, +155, 3, +152, 2, +149, 2, +146, 1, +143, 1, +140, 1, +137, 0, +134, 0, +131, 0, +128, 0, +124, 0, +121, 0, +118, 0, +115, 1, +112, 1, +109, 1, +106, 2, +103, 2, +100, 3, +97, 4, +93, 5, +90, 5, +88, 6, +85, 7, +82, 9, +79, 10, +76, 11, +73, 12, +70, 14, +67, 15, +65, 17, +62, 18, +59, 20, +57, 21, +54, 23, +52, 25, +49, 27, +47, 29, +44, 31, +42, 33, +40, 35, +37, 37, +35, 40, +33, 42, +31, 44, +29, 47, +27, 49, +25, 52, +23, 54, +21, 57, +20, 59, +18, 62, +17, 65, +15, 67, +14, 70, +12, 73, +11, 76, +10, 79, +9, 82, +7, 85, +6, 88, +5, 90, +5, 93, +4, 97, +3, 100, +2, 103, +2, 106, +1, 109, +1, 112, +1, 115, +0, 118, +0, 121, +0, 124, +0, 127, +0, 131, +0, 134, +0, 137, +1, 140, +1, 143, +1, 146, +2, 149, +2, 152, +3, 155, +4, 158, +5, 162, +5, 165, +6, 167, +7, 170, +9, 173, +10, 176, +11, 179, +12, 182, +14, 185, +15, 188, +17, 190, +18, 193, +20, 196, +21, 198, +23, 201, +25, 203, +27, 206, +29, 208, +31, 211, +33, 213, +35, 215, +37, 218, +40, 220, +42, 222, +44, 224, +47, 226, +49, 228, +52, 230, +54, 232, +57, 234, +59, 235, +62, 237, +65, 238, +67, 240, +70, 241, +73, 243, +76, 244, +79, 245, +82, 246, +85, 248, +88, 249, +90, 250, +93, 250, +97, 251, +100, 252, +103, 253, +106, 253, +109, 254, +112, 254, +115, 254, +118, 255, +121, 255, +124, 255, +}; + int main(void) { /* Configure clocks for 168 MHz system clock. @@ -100,6 +359,7 @@ int main(void) { OUT(10) | OUT(11) | OUT(12) | OUT(13) | OUT(14) | OUT(15); GPIOB->AFR[0] = AFRL(0, 2) | AFRL(1, 2) | AFRL(3, 1) | AFRL(6, 6) | AFRL(7, 6); GPIOB->AFR[1] = AFRH(8, 4) | AFRH(9, 4); + GPIOB->OSPEEDR = (3<<0) | (3<<1) | (3<<3); /* GPIOC: * C0-C3: (testpoint) @@ -118,6 +378,7 @@ int main(void) { IN(6) | IN(7) | IN(8) | AF(10); GPIOC->AFR[1] = AFRH(10, 2); + GPIOC->OSPEEDR = (3<<10); /* GPIOD: * D0-D6: (testpoint) @@ -127,14 +388,25 @@ int main(void) { GPIOD->MODER = IN(0) | IN(1) | IN(2) | IN(3) | IN(4) | IN(5) | IN(6) | IN(8) | IN(9); - TIM1->CCMR1 = (6<<TIM_CCMR1_OC2M_Pos); - TIM1->CCMR2 = (6<<TIM_CCMR2_OC3M_Pos); + TIM1->CCMR1 = (6<<TIM_CCMR1_OC2M_Pos) | TIM_CCMR1_OC2PE; + TIM1->CCMR2 = (6<<TIM_CCMR2_OC3M_Pos) | TIM_CCMR2_OC3PE; TIM1->CCER = TIM_CCER_CC2E | TIM_CCER_CC2NE | TIM_CCER_CC3E | TIM_CCER_CC3NE; - TIM1->BDTR = TIM_BDTR_MOE | (32<<TIM_BDTR_DTG_Pos); - TIM1->PSC = 0; + TIM1->BDTR = TIM_BDTR_MOE | (32<<TIM_BDTR_DTG_Pos) | TIM_BDTR_MOE; + TIM1->DCR = (14<<TIM_DCR_DBA_Pos) | (1<<TIM_DCR_DBL_Pos); + TIM1->PSC = 4; TIM1->ARR = 256; + TIM1->CCR2 = 64; + TIM1->CCR3 = 192; + TIM1->DIER = TIM_DIER_UDE; TIM1->CR1 |= TIM_CR1_CEN; - + + DMAMUX1->CCR = 25; + DMA1_Channel1->CCR = (1<<DMA_CCR_MSIZE_Pos) | (1<<DMA_CCR_PSIZE_Pos) | DMA_CCR_MINC | DMA_CCR_CIRC | DMA_CCR_DIR | DMA_CCR_TCIE; + DMA1_Channel1->CNDTR = COUNT_OF(waveform); + DMA1_Channel1->CPAR = &TIM1->DMAR; + DMA1_Channel1->CMAR = &waveform; + DMA1_Channel1->CCR |= DMA_CCR_EN; + int i = 0; int j = 0; while (23) { |