diff options
| author | jaseg <git@jaseg.de> | 2023-10-02 14:50:03 +0200 |
|---|---|---|
| committer | jaseg <git@jaseg.de> | 2023-10-02 14:50:03 +0200 |
| commit | 8e42ca09787ab7698a068df71e37f388ca1b2e9f (patch) | |
| tree | 3982eb94858ed6e76d4ead4c50714b732f265a0a /center_fw/src/main.c | |
| parent | 72cffd586a7d2cd20bd8256a920b2caac8c7db85 (diff) | |
| download | 8seg-8e42ca09787ab7698a068df71e37f388ca1b2e9f.tar.gz 8seg-8e42ca09787ab7698a068df71e37f388ca1b2e9f.tar.bz2 8seg-8e42ca09787ab7698a068df71e37f388ca1b2e9f.zip | |
Transmission works including sync and whitening
Diffstat (limited to 'center_fw/src/main.c')
| -rw-r--r-- | center_fw/src/main.c | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/center_fw/src/main.c b/center_fw/src/main.c index a4f7d9e..68a787f 100644 --- a/center_fw/src/main.c +++ b/center_fw/src/main.c @@ -155,11 +155,15 @@ int main(void) { if (packet_received) { if (rng_reset) { packet_rng_state = xorshift32(1); + rng_reset = false; + GPIOB->BSRR = (1<<7); + } else { + GPIOB->BRR = (1<<7); } for(size_t i=0; i<sizeof(rx_buf.packet); i++) { packet_rng_state = xorshift32(packet_rng_state); - // rx_buf.bytes[i] ^= packet_rng_state; FIXME DEBUG + rx_buf.bytes[i] ^= packet_rng_state; } uint32_t crc_state = crc32_reset(); @@ -169,6 +173,7 @@ int main(void) { crc_state = crc32_finalize(crc_state); if (crc_state == rx_buf.packet.crc) { + GPIOA->BSRR = (1<<6); /* good packet received */ int val = rx_buf.packet.brightness[CONFIG_MODULE_ADDRESS/2]; if (CONFIG_MODULE_ADDRESS & 1) { @@ -178,6 +183,7 @@ int main(void) { channel_mask = rx_buf.packet.channels[CONFIG_MODULE_ADDRESS]; } else { + GPIOA->BRR = (1<<6); errors.crc_errors++; } @@ -203,7 +209,6 @@ void gdb_dump(void) { void ADC1_IRQHandler(void) { static int phase = 0; static int last_bit = 0; - GPIOB->BSRR = (1<<7); /* Read sample and apply threshold */ int sample = ADC1->DR; /* resets the EOC interrupt flag */ @@ -300,11 +305,9 @@ void ADC1_IRQHandler(void) { if (phase == SAMPLES_PER_BAUD - LED_DEAD_TIME || bit != last_bit || bit_margin < MIN_RECTIFIER_MARGIN) { /* reset */ GPIOA->BRR = (1<<11); /* RECT1 */ GPIOC->BRR = (1<<15); /* RECT2 */ - GPIOA->BRR = (1<<6); } else if (phase == LED_DEAD_TIME) { /* set */ if (bit) { - GPIOA->BSRR = (1<<6); #ifndef DEBUG_DISABLE_DRIVERS GPIOC->BSRR = (1<<15); /* RECT2 */ #endif @@ -329,7 +332,6 @@ void ADC1_IRQHandler(void) { } last_bit = bit; - GPIOB->BRR = (1<<7); } void TIM14_IRQHandler(void) { |