diff options
author | jaseg <git@jaseg.de> | 2023-09-25 23:57:36 +0200 |
---|---|---|
committer | jaseg <git@jaseg.de> | 2023-09-25 23:57:36 +0200 |
commit | 8cc05c79cea62609d02231492c054a0cca2b2289 (patch) | |
tree | e39d40456adefe9bb70bcd77ebdf97be1dcdc028 /center_fw/include/stm32_irqs.h | |
parent | 583ac10d1450610a4110849c26cc16f03154d26e (diff) | |
download | 8seg-8cc05c79cea62609d02231492c054a0cca2b2289.tar.gz 8seg-8cc05c79cea62609d02231492c054a0cca2b2289.tar.bz2 8seg-8cc05c79cea62609d02231492c054a0cca2b2289.zip |
Center firmware WIP
Diffstat (limited to 'center_fw/include/stm32_irqs.h')
-rw-r--r-- | center_fw/include/stm32_irqs.h | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/center_fw/include/stm32_irqs.h b/center_fw/include/stm32_irqs.h new file mode 100644 index 0000000..86d1312 --- /dev/null +++ b/center_fw/include/stm32_irqs.h @@ -0,0 +1,54 @@ +/* AUTOGENERATED FILE! DO NOT MODIFY! */ +/* Generated 2023-07-10 20:34:05.404513 from startup.s by gen_isr_header.py */ + +void _estack(void); /* 0 */ +void Reset_Handler(void); /* 1 */ +void NMI_Handler(void); /* 2 */ +void HardFault_Handler(void); /* 3 */ +/* IRQ 4 is undefined for this part. */ +/* IRQ 5 is undefined for this part. */ +/* IRQ 6 is undefined for this part. */ +/* IRQ 7 is undefined for this part. */ +/* IRQ 8 is undefined for this part. */ +/* IRQ 9 is undefined for this part. */ +/* IRQ 10 is undefined for this part. */ +void SVC_Handler(void); /* 11 */ +/* IRQ 12 is undefined for this part. */ +/* IRQ 13 is undefined for this part. */ +void PendSV_Handler(void); /* 14 */ +void SysTick_Handler(void); /* 15 */ +void WWDG_IRQHandler(void); /* 16 */ +/* IRQ 17 is undefined for this part. */ +void RTC_TAMP_IRQHandler(void); /* 18 */ +void FLASH_IRQHandler(void); /* 19 */ +void RCC_IRQHandler(void); /* 20 */ +void EXTI0_1_IRQHandler(void); /* 21 */ +void EXTI2_3_IRQHandler(void); /* 22 */ +void EXTI4_15_IRQHandler(void); /* 23 */ +/* IRQ 24 is undefined for this part. */ +void DMA1_Channel1_IRQHandler(void); /* 25 */ +void DMA1_Channel2_3_IRQHandler(void); /* 26 */ +void DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler(void); /* 27 */ +void ADC1_IRQHandler(void); /* 28 */ +void TIM1_BRK_UP_TRG_COM_IRQHandler(void); /* 29 */ +void TIM1_CC_IRQHandler(void); /* 30 */ +/* IRQ 31 is undefined for this part. */ +void TIM3_IRQHandler(void); /* 32 */ +void TIM6_IRQHandler(void); /* 33 */ +void TIM7_IRQHandler(void); /* 34 */ +void TIM14_IRQHandler(void); /* 35 */ +void TIM15_IRQHandler(void); /* 36 */ +void TIM16_IRQHandler(void); /* 37 */ +void TIM17_IRQHandler(void); /* 38 */ +void I2C1_IRQHandler(void); /* 39 */ +void I2C2_IRQHandler(void); /* 40 */ +void SPI1_IRQHandler(void); /* 41 */ +void SPI2_IRQHandler(void); /* 42 */ +void USART1_IRQHandler(void); /* 43 */ +void USART2_IRQHandler(void); /* 44 */ +void USART3_4_IRQHandler(void); /* 45 */ + +#define NUM_IRQs 46 +extern uint32_t g_pfnVectors[NUM_IRQs]; +#define isr_vector g_pfnVectors + |