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| author | jaseg <git@jaseg.net> | 2018-11-25 13:11:59 +0900 |
|---|---|---|
| committer | jaseg <git@jaseg.net> | 2018-11-25 13:11:59 +0900 |
| commit | 260b611fc37b484400d023867e7058cefc552c6f (patch) | |
| tree | dae5341b4a81fbcd3b9140943866f4b7ac9412a1 /center/center.pro | |
| parent | c36fa6263b6bf926666b2be9d94d9500cbbb667a (diff) | |
| download | 8seg-260b611fc37b484400d023867e7058cefc552c6f.tar.gz 8seg-260b611fc37b484400d023867e7058cefc552c6f.tar.bz2 8seg-260b611fc37b484400d023867e7058cefc552c6f.zip | |
center: initial schematic
Diffstat (limited to 'center/center.pro')
| -rw-r--r-- | center/center.pro | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/center/center.pro b/center/center.pro new file mode 100644 index 0000000..152769c --- /dev/null +++ b/center/center.pro @@ -0,0 +1,33 @@ +update=22/05/2015 07:44:53 +version=1 +last_client=kicad +[general] +version=1 +RootSch= +BoardNm= +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir= +[eeschema/libraries] |