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authorjaseg <git@jaseg.net>2019-04-15 01:24:48 +0900
committerjaseg <git@jaseg.net>2019-04-15 01:24:48 +0900
commitaf19e3b1128e7d2de425849c342db59eece729e3 (patch)
treed30a92e9c01b71ef37eb1975ef8093d6223a5197
parent668c89f88988e4bd6149fa7d13650254037f028d (diff)
download8seg-af19e3b1128e7d2de425849c342db59eece729e3.tar.gz
8seg-af19e3b1128e7d2de425849c342db59eece729e3.tar.bz2
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driver/hw: add a bunch of todos
-rw-r--r--driver/driver.sch4
1 files changed, 2 insertions, 2 deletions
diff --git a/driver/driver.sch b/driver/driver.sch
index a4f3fbb..0abe822 100644
--- a/driver/driver.sch
+++ b/driver/driver.sch
@@ -1,6 +1,6 @@
EESchema Schematic File Version 4
LIBS:driver-cache
-EELAYER 26 0
+EELAYER 29 0
EELAYER END
$Descr A2 23386 16535
encoding utf-8
@@ -2745,6 +2745,6 @@ F 3 "~" H 17400 2950 50 0001 C CNN
1 0 0 -1
$EndComp
Text Notes 7600 10050 0 50 ~ 0
-TODO:\n* RS485 drv fp is wide, should be narrow SOIC-8\n* Heatsink holes are plated-through, shouln't be\n* Add thermal reliefs in upper logic ground plane\n* GND/VCC input labels are swapped
+TODO:\n* RS485 drv fp is wide, should be narrow SOIC-8\n* Heatsink holes are plated-through, shouln't be\n* Add thermal reliefs in upper logic ground plane\n* GND/VCC input labels are swapped\n* White label field for MAC\n* Remove optoisolators\n* Add series resistor to RS485 GND\n* Add decoupling cap next to mosfet temp sensor
NoConn ~ 14600 2800
$EndSCHEMATC