From 31fc78d0e00f9c82f03c88367a7e23b2df918ca6 Mon Sep 17 00:00:00 2001 From: jaseg Date: Fri, 5 Jan 2018 11:39:20 +0100 Subject: Add some documentation --- hw/chibi/chibi_2024/bom-chibi.ods | Bin 28559 -> 32334 bytes hw/chibi/chibi_2024/chibi_2024.kicad_pcb | 14 +++++++------- hw/chibi/chibi_2024/rotator.py | 22 ++++++++++++++++++++++ 3 files changed, 29 insertions(+), 7 deletions(-) create mode 100755 hw/chibi/chibi_2024/rotator.py (limited to 'hw/chibi/chibi_2024') diff --git a/hw/chibi/chibi_2024/bom-chibi.ods b/hw/chibi/chibi_2024/bom-chibi.ods index 5b05ffe..ce6eec8 100644 Binary files a/hw/chibi/chibi_2024/bom-chibi.ods and b/hw/chibi/chibi_2024/bom-chibi.ods differ diff --git a/hw/chibi/chibi_2024/chibi_2024.kicad_pcb b/hw/chibi/chibi_2024/chibi_2024.kicad_pcb index d96f401..25b3796 100644 --- a/hw/chibi/chibi_2024/chibi_2024.kicad_pcb +++ b/hw/chibi/chibi_2024/chibi_2024.kicad_pcb @@ -14,16 +14,16 @@ (page A4) (layers - (0 F.Cu signal) + (0 F.Cu signal hide) (31 B.Cu signal) (32 B.Adhes user hide) (33 F.Adhes user hide) - (34 B.Paste user hide) - (35 F.Paste user) - (36 B.SilkS user hide) + (34 B.Paste user) + (35 F.Paste user hide) + (36 B.SilkS user) (37 F.SilkS user hide) - (38 B.Mask user hide) - (39 F.Mask user) + (38 B.Mask user) + (39 F.Mask user hide) (40 Dwgs.User user hide) (41 Cmts.User user hide) (42 Eco1.User user hide) @@ -71,7 +71,7 @@ (pad_drill 0.9) (pad_to_mask_clearance 0.2) (aux_axis_origin 0 0) - (visible_elements FFFEFF7F) + (visible_elements FFFEBF7F) (pcbplotparams (layerselection 0x010fc_80000001) (usegerberextensions false) diff --git a/hw/chibi/chibi_2024/rotator.py b/hw/chibi/chibi_2024/rotator.py new file mode 100755 index 0000000..cf45253 --- /dev/null +++ b/hw/chibi/chibi_2024/rotator.py @@ -0,0 +1,22 @@ +#!/usr/bin/env python3 + +import re + +with open('chibi_2024.kicad_pcb') as f: + lines = f.readlines() + +def mangled(lines): + for l in lines: + if 'fp_text' in l and not l.strip().endswith('hide'): + at_re = '\((at\s\S+\s\S+)(\s\S+)?\)' + match = re.search(at_re, l) + if not match: + raise Exception() + rot = int(match.group(2) or '0') + rot = (rot+180)%360 + yield re.sub(at_re, r'(\1 {})'.format(rot), l) + else: + yield l + +with open('out.kicad_pcb', 'w') as f: + f.write(''.join(mangled(lines))) -- cgit