From abee92c4ec04a4ef45a59ad94cb474f59a15f460 Mon Sep 17 00:00:00 2001
From: jaseg <git-bigdata-wsl-arch@jaseg.de>
Date: Mon, 22 Feb 2021 13:03:14 +0100
Subject: Begin routing control board
---
control_board/control_board.kicad_pro | 174 ++++++++++++++++++++++++++++++++--
1 file changed, 164 insertions(+), 10 deletions(-)
(limited to 'control_board/control_board.kicad_pro')
diff --git a/control_board/control_board.kicad_pro b/control_board/control_board.kicad_pro
index 3b956bc..e2725c9 100644
--- a/control_board/control_board.kicad_pro
+++ b/control_board/control_board.kicad_pro
@@ -2,26 +2,180 @@
"board": {
"design_settings": {
"defaults": {
- "board_outline_line_width": 0.1,
- "copper_line_width": 0.2,
+ "board_outline_line_width": 0.09999999999999999,
+ "copper_line_width": 0.19999999999999998,
+ "copper_text_italic": false,
"copper_text_size_h": 1.5,
"copper_text_size_v": 1.5,
"copper_text_thickness": 0.3,
+ "copper_text_upright": false,
+ "courtyard_line_width": 0.049999999999999996,
+ "dimension_precision": 4,
+ "dimension_units": 3,
+ "dimensions": {
+ "arrow_length": 1270000,
+ "extension_offset": 500000,
+ "keep_text_aligned": true,
+ "suppress_zeroes": false,
+ "text_position": 0,
+ "units_format": 1
+ },
+ "fab_line_width": 0.09999999999999999,
+ "fab_text_italic": false,
+ "fab_text_size_h": 1.0,
+ "fab_text_size_v": 1.0,
+ "fab_text_thickness": 0.15,
+ "fab_text_upright": false,
"other_line_width": 0.15,
+ "other_text_italic": false,
+ "other_text_size_h": 1.0,
+ "other_text_size_v": 1.0,
+ "other_text_thickness": 0.15,
+ "other_text_upright": false,
+ "pads": {
+ "drill": 0.762,
+ "height": 1.524,
+ "width": 1.524
+ },
"silk_line_width": 0.15,
+ "silk_text_italic": false,
"silk_text_size_h": 1.0,
"silk_text_size_v": 1.0,
- "silk_text_thickness": 0.15
+ "silk_text_thickness": 0.15,
+ "silk_text_upright": false,
+ "zones": {
+ "45_degree_only": false,
+ "min_clearance": 0.508
+ }
},
- "diff_pair_dimensions": [],
+ "diff_pair_dimensions": [
+ {
+ "gap": 0.0,
+ "via_gap": 0.0,
+ "width": 0.0
+ }
+ ],
"drc_exclusions": [],
+ "meta": {
+ "version": 1
+ },
+ "rule_severities": {
+ "annular_width": "error",
+ "clearance": "error",
+ "copper_edge_clearance": "error",
+ "courtyards_overlap": "error",
+ "diff_pair_gap_out_of_range": "error",
+ "diff_pair_uncoupled_length_too_long": "error",
+ "drill_out_of_range": "error",
+ "duplicate_footprints": "warning",
+ "extra_footprint": "warning",
+ "hole_clearance": "error",
+ "hole_near_hole": "error",
+ "invalid_outline": "error",
+ "item_on_disabled_layer": "error",
+ "items_not_allowed": "error",
+ "length_out_of_range": "error",
+ "malformed_courtyard": "error",
+ "microvia_drill_out_of_range": "error",
+ "missing_courtyard": "ignore",
+ "missing_footprint": "warning",
+ "net_conflict": "warning",
+ "npth_inside_courtyard": "ignore",
+ "padstack": "error",
+ "pth_inside_courtyard": "ignore",
+ "shorting_items": "error",
+ "silk_over_copper": "error",
+ "silk_overlap": "error",
+ "skew_out_of_range": "error",
+ "too_many_vias": "error",
+ "track_dangling": "warning",
+ "track_width": "error",
+ "tracks_crossing": "error",
+ "unconnected_items": "error",
+ "unresolved_variable": "error",
+ "via_dangling": "warning",
+ "zone_has_empty_net": "error",
+ "zones_intersect": "error"
+ },
"rules": {
+ "allow_blind_buried_vias": false,
+ "allow_microvias": false,
+ "max_error": 0.005,
+ "min_clearance": 0.127,
"min_copper_edge_clearance": 0.0,
+ "min_hole_clearance": 0.0,
+ "min_hole_to_hole": 0.25,
+ "min_microvia_diameter": 0.19999999999999998,
+ "min_microvia_drill": 0.09999999999999999,
+ "min_silk_clearance": 0.0,
+ "min_through_hole_diameter": 0.3,
+ "min_track_width": 0.127,
+ "min_via_annular_width": 0.049999999999999996,
+ "min_via_diameter": 0.39999999999999997,
"solder_mask_clearance": 0.0,
- "solder_mask_min_width": 0.0
+ "solder_mask_min_width": 0.0,
+ "solder_paste_clearance": 0.0,
+ "solder_paste_margin_ratio": -0.0
},
- "track_widths": [],
- "via_dimensions": []
+ "track_widths": [
+ 0.0,
+ 0.1,
+ 0.15,
+ 0.2,
+ 0.25,
+ 0.3,
+ 0.4,
+ 0.5,
+ 0.6,
+ 0.7,
+ 0.8,
+ 1.0,
+ 1.2,
+ 1.5,
+ 1.8,
+ 2.2,
+ 2.5
+ ],
+ "via_dimensions": [
+ {
+ "diameter": 0.0,
+ "drill": 0.0
+ },
+ {
+ "diameter": 0.45,
+ "drill": 0.2
+ },
+ {
+ "diameter": 0.6,
+ "drill": 0.3
+ },
+ {
+ "diameter": 0.8,
+ "drill": 0.4
+ },
+ {
+ "diameter": 1.0,
+ "drill": 0.5
+ },
+ {
+ "diameter": 1.2,
+ "drill": 0.6
+ },
+ {
+ "diameter": 1.2,
+ "drill": 0.7
+ },
+ {
+ "diameter": 1.5,
+ "drill": 0.8
+ },
+ {
+ "diameter": 1.8,
+ "drill": 1.0
+ }
+ ],
+ "zones_allow_external_fillets": false,
+ "zones_use_no_outline": true
},
"layer_presets": []
},
@@ -245,7 +399,7 @@
"classes": [
{
"bus_width": 6.0,
- "clearance": 0.2,
+ "clearance": 0.127,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
"diff_pair_width": 0.2,
@@ -255,7 +409,7 @@
"name": "Default",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
- "track_width": 0.25,
+ "track_width": 0.127,
"via_diameter": 0.8,
"via_drill": 0.4,
"wire_width": 6.0
@@ -308,7 +462,7 @@
},
"sheets": [
[
- "4f7cf9b2-25ee-4cbd-9cd7-4f6ba2e8f619",
+ "6cac017c-38c8-4c28-b0be-3f7895c0577c",
""
]
],
--
cgit